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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
GENERAL DESCRIPTION
The ICS840-75 is a SAS/SATA Oscillator Replacement and a member of the HiPerClockSTM HiPerClocks TM family of high perfor mance devices from ICS. The ICS840-75 uses a 25MHz cr ystal to synthesize 75MHz. The ICS840-75 has excellent jitter performance. The ICS840-75 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.
FEATURES
* One LVCMOS/LVTTL output, 15 output impedence * Crystal oscillator interface designed for 25MHz, 18pF parallel resonant crystal * Output frequency: 75MHz * Random jitter: 3ps (typical) * Deterministic jitter: 0.14ps (typical) * 3.3V operating supply * 0C to 70C ambient operating temperature * Available in both standard and lead-free RoHS-compliant packages
IC S
BLOCK DIAGRAM
OE
Pullup
PIN ASSIGNMENT
VDD XTAL_OUT XTAL_IN OE 1 2 3 4 8 7 6 5 nc Q VDDO GND
25MHz
XTAL_IN
75MHz
Clock Synthesizer
Q
ICS840-75
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
XTAL_OUT
ICS840-75
8-Lead SOIC 3.90mm x 4.92mm x 1.37mm body package M Package Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 840AG-75 www.icst.com/products/hiperclocks.html REV A. NOVEMBER 7, 2005
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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
TABLE 1. PIN DESCRIPTIONS
Number 1 2, 3 4 5 6 7 8 Name VDD XTAL_OUT, XTAL_IN OE GND VDDO Q nc Power Input Input Power Power Output Unused Pullup Type Description Power supply pin. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Output enable pin. When HIGH, Q output is enabled. When LOW, forces Q output to HiZ state. LVCMOS/LVTTL interface levels. Power supply ground. Output supply pin. Single-ended clock output. LVCMOS/LVTTL interface levels. 15 output impedence. No connect
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLUP ROUT Parameter Input Capacitance Input Pullup Resistor Output Impedance Test Conditions Minimum Typical 4 51 15 Maximum Units pF k
TABLE 3. CONTROL FUNCTION TABLE
Control Inputs OE 0 1 Output Q Hi-Z Active
840AG-75
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO 4.6V -0.5V to VDD + 0.5 V -0.5V to VDDO + 0.5V NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Package Thermal Impedance, JA 8 Lead TSSOP 101.7C/W (0 mps) 8 Lead SOIC Storage Temperature, TSTG 112.7C/W (0 lfpm) -65C to 150C
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V0.3V, TA = 0C TO 70C
Symbol VDD VDDO IDD IDDO Parameter Power Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current OE = VDD (output enabled) Test Conditions Minimum 3.0 3.0 Typical 3.3 3.3 80 8 Maximum 3.6 3.6 Units V V mA mA
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V0.3V, TA = 0C TO 70C
Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage; NOTE 1 VDD = VIN = 3.6V VDD = 3.6V, VIN = 0V -150 2.6 0.5 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 0.8 5 Units V V A A V V
Output Low Voltage; NOTE 1 VOL NOTE 1: Outputs terminated with 50 to VDDO/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit".
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level Test Conditions Minimum Typical Fundamental 25 TBD 7 TBD MHz pF W Maximum Units
840AG-75
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
TABLE 6. AC CHARACTERISTICS, VDD = VDDO = 3.3V0.3V,, TA = 0C TO 70C
Symbol fOUT tDJ tRJ tRMS tp-p tacc tOSC t R / tF Parameter Output Frequency Deterministic Jitter ; NOTE 1 Random Jitter ; NOTE 1 RMS of Total Distribution (); NOTE 1 Peak-to-Peak Jitter ; NOTE 1 Accumulated Jitter (); NOTE 1 Oscillation Star t Up Time Output Rise/Fall Time Test Conditions Minimum Typical 75 0.14 3 3.05 2.7 n = 2 to 50000 cycles Time at minimum operating voltage to be 0 s 20% to 80% TBD 50 TB D 10 Maximum Units MHz ps ps ps ps ps ms ps %
odc Output Duty Cycle NOTE 1: Measured using Wavecrest SIA-3000.
840AG-75
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
PARAMETER MEASUREMENT INFORMATION
1.65V 0.15V
VDD, VDDO
SCOPE
Q
Qx
V
DDO
2
t PW
t
PERIOD
LVCMOS
GND
odc = -1.65V 0.15V
t PW t PERIOD
x 100%
3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80% 20% tR
80% 20% tF
Clock Outputs
OUTPUT RISE/FALL TIME
840AG-75
www.icst.com/products/hiperclocks.html
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
APPLICATION INFORMATION
CRYSTAL INPUT INTERFACE
The ICS840-75 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 1 below were determined using a 25MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_OUT C1 12p X1 18pF Parallel Cry stal XTAL_IN C2 12p
Figure 1. CRYSTAL INPUt INTERFACE
840AG-75
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
RELIABILITY INFORMATION
TABLE 7A. JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
JA by Velocity (Meters per Second)
0
Multi-Layer PCB, JEDEC Standard Test Boards 101.7C/W
1
90.5C/W
2.5
89.8C/W
TABLE 7B. JAVS. AIR FLOW TABLE 8 LEAD SOIC
JA by Velocity (Linear Feet per Minute)
0
Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 153.3C/W 112.7C/W
200
128.5C/W 103.3C/W
500
115.5C/W 97.1C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS840-75 is: 2423
840AG-75
www.icst.com/products/hiperclocks.html
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
PACKAGE OUTLINE - G SUFFIX
FOR
8 LEAD TSSOP
PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC
TABLE 8A. PACKAGE DIMENSIONS
SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
TABLE 8B. PACKAGE DIMENSIONS
SYMBOL N A A1 B C D E e H h L 5.80 0.25 0.40 0 1.35 0.10 0.33 0.19 4.80 3.80 1.27 BASIC 6.20 0.50 1.27 8 Millimeters MINIMUM 8 1.75 0.25 0.51 0.25 5.00 4.00 MAXIMUM
Reference Document: JEDEC Publication 95, MS-012
Reference Document: JEDEC Publication 95, MO-153
840AG-75
www.icst.com/products/hiperclocks.html
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REV A. NOVEMBER 7, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840-75
75MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT
TABLE 9. ORDERING INFORMATION
Part/Order Number ICS840AG-75 ICS840AG-75T ICS840AG-75LF ICS840AG-75LFT ICS840AM-75 ICS840AM-75T ICS840AM-75LF ICS840AM-75LFT Marking 40A75 40A75 0A75L 0A75L TBD TBD TBD TBD Package 8 lead TSSOP 8 lead TSSOP 8 lead "Lead-Free" TSSOP 8 lead "Lead-Free" TSSOP 8 lead SOIC 8 lead SOIC 8 lead "Lead-Free" SOIC 8 lead "Lead-Free" SOIC Shipping Packaging tube 2500 tape & reel tube 2500 tape & reel tube 2500 tape & reel tube 2500 tape & reel Temperature 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840AG-75
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REV A. NOVEMBER 7, 2005

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